/**
 * Copyright (C) 2021 - 2031 O-Cubes Co., Ltd.
 */

/****************************************************************
 *  @file    dw_uart_hal.h
 *  @brief   Designware uart driver hal header
 *  @version v1.0
 *  @date    03. Apr. 2023
 ****************************************************************/

#ifndef __DW_UART_HAL_H__
#define __DW_UART_HAL_H__

#include "bits.h"

/* DW APB UART bit definitions */

/**
 * DesignWare UART hal IER related macros
 */
/* IER */
#define DW_UART_IER_DATA_AVAIL                  BIT(0)
#define DW_UART_IER_XMIT_EMPTY                  BIT(1)
#define DW_UART_IER_LINE_STATUS                 BIT(2)
#define DW_UART_IER_MDM_STATUS                  BIT(3)
#define DW_UART_IER_PTIME                       BIT(7)

/**
 * DesignWare UART hal IIR related macros
 */
/* IIR */
/* IIR READ */
#define DW_UART_IIR_IP                          (0x01)
#define DW_UART_IIR_MASK                        (0x0E)
#define DW_UART_IIR_READ_FIFO_ENABLE            (0xC0)

/* Possible interrupt IIR_MASK values */
#define DW_UART_IIR_MDM_STATUS                  (0x00)
#define DW_UART_IIR_XMIT_EMPTY                  (0x02)
#define DW_UART_IIR_DATA_AVAIL                  (0x04)
#define DW_UART_IIR_LINE_STATUS                 (0x06)
#define DW_UART_IIR_RX_TIMEOUT                  (0x0C)
#define DW_UART_IIR_INT_ID_MASK                 (0x0f)

/* IIR WRITE */
#define DW_UART_IIR_FIFO_ENABLE                 (0x01)
#define DW_UART_IIR_RCVR_FIFO_RESET             (0x02)
#define DW_UART_IIR_XMIT_FIFO_RESET             (0x04)
#define DW_UART_IIR_DMA_MODE_SELECT             (0x08)
#define DW_UART_IIR_RCV_TRIGGER_MASK            (0xC0)

/* Values for IIR receive trigger */
#define DW_UART_IIR_TRIGGER_LEVEL_1_CHAR        (0x00)
#define DW_UART_IIR_TRIGGER_LEVEL_1_4_FULL      (0x40)
#define DW_UART_IIR_TRIGGER_LEVEL_1_2_FULL      (0x80)
#define DW_UART_IIR_TRIGGER_LEVEL_2_LESS_FULL   (0xC0)

/**
 * DesignWare UART hal LCR related macros
 */
/* LCR */
#define DW_UART_LCR_WORD_LEN_MASK               (0x03)
#define DW_UART_LCR_STOP_BIT_MASK               (0x04)
#define DW_UART_LCR_PARITY_MASK                 (0x38)
#define DW_UART_LCR_DPS_MASK                    (0x3F)
#define DW_UART_LCR_STICK_PARITY                (0x20)
#define DW_UART_LCR_BREAK                       (0x40)
#define DW_UART_LCR_DLAB                        (0x80)

/* Word length values */
#define DW_UART_LCR_WORD_LEN5                   (0x00)
#define DW_UART_LCR_WORD_LEN6                   (0x01)
#define DW_UART_LCR_WORD_LEN7                   (0x02)
#define DW_UART_LCR_WORD_LEN8                   (0x03)

/* stop bit values */
#define DW_UART_LCR_1_STOP_BIT                  (0x00)
#define DW_UART_LCR_1D5_STOP_BIT                (0x04)
#define DW_UART_LCR_2_STOP_BIT                  (0x04)

/* Parity bit values */
#define DW_UART_LCR_PARITY_NONE                 (0x00)
#define DW_UART_LCR_PARITY_ODD                  (0x08)
#define DW_UART_LCR_PARITY_EVEN                 (0x18)
#define DW_UART_LCR_PARITY_MARK                 (0x28)
#define DW_UART_LCR_PARITY_SPACE                (0x38)

/**
 * DesignWare UART hal MCR related macros
 */
/* MCR */
#define DW_UART_MCR_DTR                         BIT(0)
#define DW_UART_MCR_RTS                         BIT(1)
#define DW_UART_MCR_LOOPBACK                    BIT(4)
#define DW_UART_MCR_AFCE                        BIT(5)
#define DW_UART_MCR_SIRE                        BIT(6)

/**
 * DesignWare UART hal LSR related macros
 */
/* LSR */
#define DW_UART_LSR_DR                          BIT(0)
#define DW_UART_LSR_OVERRUN                     BIT(1)
#define DW_UART_LSR_PARITYERR                   BIT(2)
#define DW_UART_LSR_FRAMEERR                    BIT(3)
#define DW_UART_LSR_BREAKRCVD                   BIT(4)
#define DW_UART_LSR_TXD_EMPTY                   BIT(5)
#define DW_UART_LSR_TX_STATUS                   BIT(6)
#define DW_UART_LSR_RX_FIFOERR                  BIT(7)

/**
 * DesignWare UART hal MSR related macros
 */
/* MSR */
#define DW_UART_MSR_DCTS                        BIT(0)
#define DW_UART_MSR_DDSR                        BIT(1)
#define DW_UART_MSR_TERI                        BIT(2)
#define DW_UART_MSR_DDCD                        BIT(3)
#define DW_UART_MSR_CTS                         BIT(4)
#define DW_UART_MSR_DSR                         BIT(5)
#define DW_UART_MSR_RIC                         BIT(6)
#define DW_UART_MSR_DCD                         BIT(7)

/**
 * DesignWare UART hal FCR related macros
 */
/* FCR */
#define DW_UART_FCR_FEN                         BIT(0)
#define DW_UART_FCR_RFR                         BIT(1)
#define DW_UART_FCR_TFR                         BIT(2)
#define DW_UART_FCR_DMS                         BIT(3)
#define DW_UART_FCR_RTL                         GENMASK(7,6)

/**
 * DesignWare UART hal USR related macros
 */
/* USR */
#define DW_UART_USR_BUSY                        BIT(0)
#define DW_UART_USR_TFNF                        BIT(1)
#define DW_UART_USR_TFE                         BIT(2)
#define DW_UART_USR_RFNE                        BIT(3)
#define DW_UART_USR_RFF                         BIT(4)

/**
 * DesignWare UART hal SFE related macros
 */
/* SFE */
#define DW_UART_SFE_SHADOW_FIFO_ENABLE          BIT(0)

/**
 * DesignWare UART hal SRR related macros
 */
/* SRR */
#define DW_UART_SRR_UR                          BIT(0)
#define DW_UART_SRR_RFR                         BIT(1)
#define DW_UART_SRR_XFR                         BIT(2)

/**
 * DesignWare UART hal SRT related macros
 */
/* SRT */
#define DW_UART_SRT_TRIGGER_LEVEL_1_CHAR        (0x00)
#define DW_UART_SRT_TRIGGER_LEVEL_1_4_FULL      (0x01)
#define DW_UART_SRT_TRIGGER_LEVEL_1_2_FULL      (0x02)
#define DW_UART_SRT_TRIGGER_LEVEL_2_LESS_FULL   (0x03)

/**
 * DesignWare UART hal STET related macros
 */
/* STET*/
#define DW_UART_STET_FIFO_EMPTY                 (0x00)
#define DW_UART_STET_2_CHARS_IN_FIFO            (0x01)
#define DW_UART_STET_1_4_FULL                   (0x02)
#define DW_UART_STET_1_2_FULL                   (0x03)

/**
 * DesignWare UART hal CPR related macros
 */
/* CPR*/
#define DW_UART_CPR_FIFO_STAT                   BIT(10)
#define DW_UART_CPR_FIFO_MODE_OFS               (16)
#define DW_UART_CPR_FIFO_MODE_MASK              (0xFF)
#define DW_UART_CPR_FIFO_MODE                   GENMASK(24,16)

#endif /* __DW_UART_HAL_H__ */
